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MrT5: Dynamic Token Merging for Efficient Byte-level Language Models
Julie Kallini, Stanford University
Conference Rm #689 in-person attendance will be permitted for USC/ISI faculty, staff, students only. Open to the public virtually via the zoom link.
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Designing Priors for Bayesian Neural Networks to Enhance Probabilistic Predictive Modeling in Engineering Applications
Audrey Olivier, University of Southern California
ISI MDR #1135
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The Role of InP Technologies in Next-Generation 50-300 GHz Systems
Professor Mark Rodwell, University of California at Santa Barbara
https://usc.zoom.us/j/97017422125?pwd=Dbrt8MNMrmBV3xalKQJcAiNsggFJjJ.1&from=addon
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Julie Kallini is a second-year Ph.D. student in CS at Stanford University. In this seminar, she'll introduce MrT5 (MergeT5), a more efficient variant of ByT5 that integrates dynamically shortens input sequence length.
Join here: bit.ly/427UMYc
bit.ly/4l6C7oo
#Wildfires #Research
@viterbischool.usc.edu @usc.edu
@viterbischool.usc.edu
He will talk on the theme: Role of InP Technologies in Next-Generation 50-300 GHz Systems.
Register now, it's free and online: ca-dreams.org/events/
At 12PM PT/3PM ET - See you then!
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ISI's mission is to advance society through pioneering research and technological innovation. We cultivate an intellectually vibrant environment where researchers are empowered to imagine bold solutions to complex problems and to develop into world-class leaders. Guided by integrity, inclusion, and a commitment to excellence, we create unprecedented capabilities that harness information to transform lives.
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Featured Job Openings
To build upon its successes and global reach, ISI actively recruits exceptional talent. We are dedicated to investing in tomorrow’s leaders, providing numerous internship, job, and program opportunities for students, as well as unique opportunities for exceptional researchers in information sciences and related fields.
ASIC/FPGA Research Engineer - Digital Design
Arlington, VA
Hybrid Eligible
Perform front-end digital design of advanced ASIC or FPGA-based prototypes addressing problems of national importance while developing novel computer architectures, RTL models, and systems-on-chip.
Transformational Computer Engineer
Arlington, VA
Hybrid Eligible
Information processing capabilities are more important than ever, including hardware architectures and systems-on-chip that can reach new heights of efficiency, security and more. Such problems of national importance are being tackled by ISI.
Computer Scientist - EDA Researcher
Arlington, VA
Hybrid Eligible
The Reconfigurable Computing Group (RCG) at ISI is a leader in disrupting and advancing the fields of front-end ASIC and FPGA design, reconfigurable architectures, and EDA tools. We are currently recruiting for an EDA Researcher to join the team.
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ISI SEMINAR SERIES
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subscribe to notificationsISI SEMINAR SERIES
Keep up-to-date with the ISI seminar series by subscribing below.
You will have the option of subscribing to individual seminar topics.
Information Sciences Institute
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ISI is committed to forging a better future. Please visit our careers web page to learn how you can become a part of the ISI community.
